Well, it's been covered here before ... But I'm digging into it a little deeper:

Santa will be generous this year and I want to beef up my Najda with 3 BIII's, each in stereo mode. The principle of connection is simple and clear, but ...

Below is a partial view of the Najda board. The I2S source (3.3V) is the DSP chip on the right, the expansion port to connect the BIII's is on the outer left. The I2S signal has to travel a loooong way with no in-line resistors, so any reflection damping close to the source is not possible. Is this of any concern?

I plan to make some adapter boards and connect the Najda and the BIII's with 50 mm U.FL cables. Is it adviseable to integrate some buffers for the I2S signal?



For a buddy of mine I'll do the same with 3 OPUS DACs. Those need the MCLK signal. Is it, if ever, advisable to buffer the MCLK signal too?

And the last question for my understanding in general: Would it be a solution to attach a separate clock for the OPUS DAC triplet, so avoiding additional jitter caused by long signal lines?


Please shed some light on this ... Thanks!