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Hi Russ,
I've been attempting to connect 12S from Musiland to BII, but I get no audio. The status register shows "DSD" and "NO Lock"
As you know, I've used the registers mostly in their default startup condition (and have not applied your suggestion of programming every register)
- I've confirmed the bit clock to be 64fs and the LRCK is 44.1K. I can see the data line "all over the place" in my cheapo scope. (Also, I had tested the Musiland with OPUS several months back and it worked)
- I've only made two changes: Set for 24bit I2S and turn-off auto detection of spdif.
- The comparator switch is off
Any tips?
Thanks.
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Hmmm. I am thinking on this one. Just wanted you to know I was not ignoring the post.
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Russ,
Truly appreciated...
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Obvious question. have you tried not changing any registers at all?
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Yes, that was my first attempt. Then I noticed in the datasheet that "auto detection of spdif can only be set if there is no I2S on the pins". So I turned off the auto spdif, and set for 24 bit. I was going to try putting the original chip back and see if it works... Is the chip capable of auto detecting spdif, I2S and DSD? depending on what is applied to the pins? Update: I had been using spdif for so long that I had forgotten that I did not solder the pins. I'll do that now and report back  Russ, Sorry for wasting your time  2nd Update: It works. However, it is sensitive to dpll bandwidth. Whereas with spdif I had dpll BW at lowest, with I2S I get "unlocks" with lowest. For now high BW seems to work fine. Any Idea why the two interfaces behave different? Perhaps the spdif circuitry is more tolerant? Edited by user Wednesday, December 15, 2010 12:11:59 AM(UTC)
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This is usually a symptom of noise on the I2S lines.
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Yes the chip automatically knows the difference between DSD I2S and SPDIF as long as they are all TTL. It does this by looking at the bit clock and data rate.
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Russ, thanks. The wires are about 3 inches long. I will try twisting a gnd wire around each one and see the results. Both spdif signal and I2S signals are coming off the same fpga in the Musiland device. Update: Saw your comment at diyaudio about phase noise. Interesting that the spdif is from the same source (and requiring more processing to generate it in the musiland and decoding in the sabre) and it is "cleaner". Does the chip determines the bit-depth automatically if set at 32bit? Edited by user Wednesday, December 15, 2010 11:19:09 AM(UTC)
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For I2S yes. The bit depth setting is only really important for the other PCM input methods.
All I2s is clocked in 64fs and all 32 bits per channel are always used. Usually 16 or 8 of them are zeros. :-)
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I am not surprised that the SPDIF is cleaner, as it will be clocked out in a totally different manner. It may not even be based on the I2S data at all. I am not familiar with the device so I have no idea. The problem with some I2S is the way the bit clock is produced. If it starts with a lousy clock or a not great PLL or divider you will not get the best results. Good nough? Sure, but not as good as it really can be. Edited by user Wednesday, December 15, 2010 2:44:50 PM(UTC)
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Hah sorry I cross posted!
No it was not directed at you. :-)
Sorry for the confusion.
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Sure, I am not surprised. I2S and SPDIF are clocked in completely diferently. I2S needs a very precise bit clock to use with the lowest BW DPLL. If you don't have one you will need to increase it. The PCM2707 is not really a stellar I2S producer. :) Edited by user Friday, December 17, 2010 7:37:21 AM(UTC)
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